# Online Digital Electronics Test - Digital Electronics Test 1

Instruction:

• This is a FREE online test. DO NOT pay money to anyone to attend this test.
• Total number of questions : 20.
• Time alloted : 30 minutes.
• Each question carry 1 mark, no negative marks.
• DO NOT refresh the page.
• All the best :-).

1.

What is the resultant binary of the decimal problem 49 + 01 = ?

A.
 01010101
B.
 00110101
C.
 00110010
D.
 00110001

2.

Binary 10111111 is ________ in hexadecimal.

A.
 BF16
B.
 FB16
C.
 27716
D.
 10111111

3.

An inverter output is the complement of its input.

A.
 True
B.
 False

4.

The following waveform pattern is for a(n) ________.

A.
 2-input AND gate
B.
 2-input OR gate
C.
 Exclusive-OR gate
D.
 None of the above

5.

How many 3-line-to-8-line decoders are required for a 1-of-32 decoder?

A.
 1
B.
 2
C.
 4
D.
 8

6.

The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?

A.
 A > B = 1, A < B = 0, A < B = 1
B.
 A > B = 0, A < B = 1, A = B = 0
C.
 A > B = 1, A < B = 0, A = B = 0
D.
 A > B = 0, A < B = 1, A = B = 1

7.

A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?

A.
 The output of the gate appears to be open.
B.
 The dim indication on the logic probe indicates that the supply voltage is probably low.
C.
 The dim indication is a result of a bad ground connection on the logic probe.
D.
 The gate may be a tristate device.

8.

Most people would prefer to use ________ over HDL.

A.
 graphic descriptions
B.
 functions
C.
 VHDL
D.
 AHDL

9.

When the output of the NOR gate S-R flip-flop is in the HOLD state (no change), the inputs are ________.

A.
 S = 1, R = 1
B.
 S = 1, R = 0
C.
 S = 0, R = 1
D.
 S = 0, R = 0

10.

Erasing or programming a flash memory device is a one-step operation.

A.
 True
B.
 False

11.

DRAM uses a cross-transistor configuration.

A.
 True
B.
 False

12.

Which is a mode of operation of the GAL16V8?

A.
 Simple mode
B.
 Complex mode
C.
 Registered mode
D.
 All of the above

13.

Four subcategories of ASIC devices are available to create digital systems. These are PLDs, gate arrays, standard cells, and ________.

A.
 HCPLDs
B.
 full custom
C.
 GAL
D.
 FPLDs

14.

A NAND gate consists of an AND gate and an OR gate connected in series with each other.

A.
 True
B.
 False

15.

Solve this binary problem: 01000110 ÷ 00001010 =

A.
 0111
B.
 10011
C.
 1001
D.
 0011

16.

Which is not a step used to define the scope of an HDL project?

A.
 Are the inputs and outputs active HIGH or active LOW?
B.
 A clear vision of how to make each block work
C.
 What are the speed requirements?
D.
 How many bits of data are needed?

17.

When coming up with a strategy for dividing the overall project into manageable-size pieces one must ________.

A.
 name each input and output
B.
 fully understand how the device should operate
C.
 define successful completion of the project
D.
 know the nature of all the signals that interconnect all the pieces

18.

In a real project, the first step of definition often involves some ________ on the part of the project manager.

A.
 time
B.
 skill
C.
 research
D.
 management

19.

The stepper motor HDL will ignore its counter inputs and pass control inputs directly to the output when set in mode ________.

A.
 1
B.
 2
C.
 3
D.
 4

20.

The output of a basic 4-bit input digital-to-analog converter would be capable of outputting:

A.
 16 different values of voltage or current that are not proportional to the input binary number
B.
 16 different values of voltage or current that are proportional to the input binary number
C.
 32 different values of voltage or current that are not proportional to the input binary number
D.
 32 different values of voltage or current that are proportional to the input binary number