Electronics and Communication Engineering - Digital Electronics

6. 

Assertion (A): An SR latch has the problem of RAC condition

Reason (R): While designing a digital circuit RAC condition should be avoided.

A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true

Answer: Option B

Explanation:

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7. 

In a clocked NAND latch, race condition occur when

A. R and S are high CLK is low
B. R and CLK are high and S is low
C. R, S, CLK are high
D. R, S, CLK are low

Answer: Option C

Explanation:

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8. 

In Von-Neumann-or Princeton-type computers, the program

A. can appear any where within the memory
B. memory and data memory are clearly distinguished
C. data and instructions are distinguished at the first stage
D. none of the above

Answer: Option A

Explanation:

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9. 

In a digital system there are three inputs ABC. Output should be high when atleast two inputs are high. Then output =

A. AB + BC + AC
B. ABC + ABC + A BC + ABC
C. AB + BC + AC
D. AB + BC + AC

Answer: Option B

Explanation:

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10. 

Which of them radiates emission?

A. LED only
B. LCD only
C. Both LED and LCD
D. Neither LED nor LCD

Answer: Option A

Explanation:

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