Electronics and Communication Engineering - Digital Electronics
Exercise :: Digital Electronics - Section 21
1.
For an N bit ADC, the percentage resolution is [1/2N - 1)] 100.
Answer: Option A
Explanation:
2.
Commercial ECL gates use two ground lines and one negative supply to
A. reduce power consumption B. increase fan out C. reduce loading effect D. eliminate the effect of power line glitches on the biasing circuit
Answer: Option D
Explanation:
3.
Dynamic memory cells are constructed using
A. FETs B. MOSFETs C. Transistors D. Flip flops
Answer: Option B
Explanation:
4.
Which of the following is incorrect?
A. (8)16 = (8)8 B. (5)16 = (5)8 C. (8)2 = (2)10 D. (2)16 = (2)10
Answer: Option A
Explanation:
5.
A 3 stage Johnson counter (ring) shown in figure is clocked at a constant frequency of fc from the starting state of Q0 Q1 Q2 = 101. The frequency of output Q0 Q1 Q2 will be
Answer: Option C
Explanation:
