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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 21
1.
For an N bit ADC, the percentage resolution is [1/2N - 1)] 100.
True
False
Answer: Option
Explanation:
No answer description is available. Let's discuss.
2.
Commercial ECL gates use two ground lines and one negative supply to
reduce power consumption
increase fan out
reduce loading effect
eliminate the effect of power line glitches on the biasing circuit
Answer: Option
Explanation:
No answer description is available. Let's discuss.
3.
Dynamic memory cells are constructed using
FETs
MOSFETs
Transistors
Flip flops
Answer: Option
Explanation:
No answer description is available. Let's discuss.
4.
Which of the following is incorrect?
(8)16 = (8)8
(5)16 = (5)8
(8)2 = (2)10
(2)16 = (2)10
Answer: Option
Explanation:
No answer description is available. Let's discuss.
5.
A 3 stage Johnson counter (ring) shown in figure is clocked at a constant frequency of fc from the starting state of Q0 Q1 Q2 = 101. The frequency of output Q0 Q1 Q2 will be
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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