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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 14
1.
A voltage DAC is generally slower than current DAC
because of more accuracy
because of higher resolution
because of response time of op-amp current to voltage converter
none of the above
Answer: Option
Explanation:
No answer description is available. Let's discuss.
2.
The circuit realizes the function
(A + B) E + CD
(A + B) (E + CD)
(A + B) (E + C + D)
(AB + E). CD
Answer: Option
Explanation:
No answer description is available. Let's discuss.
3.
For a NAND SR latch of input is the normal resting state of inputs is
S = R = 1
S = 0, R = 1
S = 1, R = 0
S = R = 0
Answer: Option
Explanation:
No answer description is available. Let's discuss.
4.
A mod-2 counter followed by a mod 5 is same as
mod-7 counter
A decade counter
mod-3 counter
none
Answer: Option
Explanation:
No answer description is available. Let's discuss.
5.
The write cycle time of memory is 200 nsec. The maximum rate of data which can be stored is
200 words/sec
5 x 103 words/sec
5 x 106 word/sec
5 x 109 words/sec
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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