Electronics and Communication Engineering - Digital Electronics
Exercise : Digital Electronics - Section 10
- Digital Electronics - Section 13
- Digital Electronics - Section 24
- Digital Electronics - Section 23
- Digital Electronics - Section 22
- Digital Electronics - Section 21
- Digital Electronics - Section 20
- Digital Electronics - Section 19
- Digital Electronics - Section 18
- Digital Electronics - Section 17
- Digital Electronics - Section 16
- Digital Electronics - Section 15
- Digital Electronics - Section 14
- Digital Electronics - Section 1
- Digital Electronics - Section 12
- Digital Electronics - Section 11
- Digital Electronics - Section 10
- Digital Electronics - Section 9
- Digital Electronics - Section 8
- Digital Electronics - Section 7
- Digital Electronics - Section 6
- Digital Electronics - Section 5
- Digital Electronics - Section 4
- Digital Electronics - Section 3
- Digital Electronics - Section 2
1.
The inputs to logic gate are 0. The output is 1. The gate is
2.
In a JK master slave flip flop race condition does not occur.
3.
State transition table and state transition diagram form part of design steps for
4.
Which binary subtraction is incorrect?
5.
Consider the following statements:
- Race around condition can occur in JK flip flop when both inputs are 1
- A flip flop is used to store one bit of information
- A transparent latch is a D type flip flop
- Master slave flip flop is used to store two bits of information
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