Electronics and Communication Engineering - Digital Electronics
Exercise :: Digital Electronics - Section 10
| 1. |
The inputs to logic gate are 0. The output is 1. The gate is |
| A. |
NAND or XOR | | B. |
OR or XOR | | C. |
AND or XOR | | D. |
NOR or Ex-NOR |
Answer: Option D
Explanation:
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| 2. |
In a JK master slave flip flop race condition does not occur. |
Answer: Option A
Explanation:
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| 3. |
State transition table and state transition diagram form part of design steps for |
| A. |
combinational circuits | | B. |
sequential circuits | | C. |
delay circuits | | D. |
all of the above |
Answer: Option B
Explanation:
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| 4. |
Which binary subtraction is incorrect? |
| A. |
100101 - 100011 = 000000 | | B. |
10000000 - 01000000 = 1000000 | | C. |
10111110.1 - 101011.11 = 110010.11 | | D. |
11111111 - 1111111 = 10000000 |
Answer: Option A
Explanation:
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| 5. |
Consider the following statements: - Race around condition can occur in JK flip flop when both inputs are 1
- A flip flop is used to store one bit of information
- A transparent latch is a D type flip flop
- Master slave flip flop is used to store two bits of information
Which of the above are correct? |
| A. |
1, 2, 3 | | B. |
1, 3, 4 | | C. |
1, 2, 4 | | D. |
2, 3, 4 |
Answer: Option D
Explanation:
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