IndiaBIX

Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 22
46.
The basic circuit configuration for TTL resembles that of a
AND gate
NAND gate
NOR gate
OR gate
Answer: Option
Explanation:
No answer description is available. Let's discuss.
47.
Time delay of a TTL standard family is about
180 ns
50 ns
18 ns
3 ns
Answer: Option
Explanation:
No answer description is available. Let's discuss.
48.

Assertion (A): Boolean expressions can be easily simplified using Karnaugh map.

Reason (R): Karnaugh map can be drawn for minterms as well as max terms.

Both A and R are correct and R is correct explanation of A
Both A and R are correct but R is not correct explanation of A
A is true, R is false
A is false, R is true
Answer: Option
Explanation:
No answer description is available. Let's discuss.
49.
In a flip flop which input determines the state to which output will transistion?
Control input
Clock input
Both control and clock input
Either control or clock input
Answer: Option
Explanation:
No answer description is available. Let's discuss.
50.
In a synchronous counter all flip flops are clocked together.
True
False
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Quick links
Quantitative Aptitude
Verbal (English)
Reasoning
Programming
Interview
Placement Papers