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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 6
31.
A multiple emitter transistor has many emitters and collectors.
True
False
Answer: Option
Explanation:

It has many emitters but one collector.

32.
A mode-10 counter can divide the clock frequency by a factor of
10
100
1000
10000
Answer: Option
Explanation:

Decade counter is divide by 10 counter.

33.
Which of the following binary numbers is equivalent to decimal 10?
1000
1100
1010
1001
Answer: Option
Explanation:

1010 = 8 + 0 + 2 + 0 = 10.

34.
A 4 bit synchronous counter has flip flops having propagation delay of 50 ns each and AND gates having propagation delay of 20 ns each. The maximum frequency of clock pulses can be
20 MHz
50 MHz
14.3 MHz
5 MHz
Answer: Option
Explanation:

Maximum delay = 50 + 20 = 70 x 10-9 s.

Hence .

35.
A counter has 4 flip flops. It divides the input frequency by
4
2
8
16
Answer: Option
Explanation:

24 = 16.

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