Electronics and Communication Engineering - Digital Electronics

46. 

In the figure, the LED

A. emits light when both S1 and S2 are closed
B. emits light when both S1 and S2 are open
C. emits light when only S1 and S2 is closed
D. does not Emit light, irrespective of the switched positions

Answer: Option D

Explanation:

To emit the light, it is necessary NAND gate output is zero, for NAND O/P zero. Both the I/O must be height. And it is not possible in any case.


47. 

A 4 bit ripple counter uses flip flops with propagation delay of 50 ns each. The maximum clock frequency which can be used is

A. 5 MHz
B. 10 MHz
C. 20 MHz
D. 25 MHz

Answer: Option A

Explanation:

Time delay = 50 x 4 x 10-9s,

.


48. 

An AND gate has two inputs A and B and one inhibit input S. Out of total 8 input states, output is 1 in

A. 1 state
B. 2 states
C. 3 states
D. 4 states

Answer: Option A

Explanation:

Only one input, i.e., A = 1, B = 1 and S = 0 gives output 1.


49. 

26810 = __________ .

A. 10A16
B. 10B16
C. 10C16
D. 10D16

Answer: Option C

Explanation:

10C in hexadecimal = 1 x 162 + 12 = 268 in decimal.


50. 

In a JK Master slave flip flop

A. both master and slave are positively clocked
B. both master and slave are negatively clocked
C. master is positively clocked and slave is negatively clocked
D. master is negatively clocked and slave is positively clocked

Answer: Option C

Explanation:


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