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Digital Electronics - Flip-Flops

Exercise : Flip-Flops - General Questions
31.
What is the hold condition of a flip-flop?
both S and R inputs activated
no active S or R input
only S is active
only R is active
Answer: Option
Explanation:
No answer description is available. Let's discuss.
32.
If an active-HIGH S-R latch has a 0 on the S input and a 1 on the R input and then the R input goes to 0, the latch will be ________.
SET
RESET
clear
invalid
Answer: Option
Explanation:
No answer description is available. Let's discuss.
33.
In VHDL, how many inputs will a primitive JK flip-flop have?
2
3
4
5
Answer: Option
Explanation:
No answer description is available. Let's discuss.
34.
A 555 operating as a monostable multivibrator has a C1 = 0.01 F. Determine R1 for a pulse width of 2 ms.
200 k
182 k
91 k
182
Answer: Option
Explanation:
No answer description is available. Let's discuss.
35.
A D flip-flop utilizing a PGT clock is in the CLEAR state. Which of the following input actions will cause it to change states?
CLK = NGT, D = 0
CLK = PGT, D = 0
CLOCK NGT, D = 1
CLOCK PGT, D = 1
CLK = NGT, D = 0, CLOCK NGT, D = 1
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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