Digital Electronics - Flip-Flops
Exercise : Flip-Flops - General Questions
- Flip-Flops - General Questions
- Flip-Flops - True or False
- Flip-Flops - Filling the Blanks
26.
What does the triangle on the clock input of a J-K flip-flop mean?
27.
A J-K flip-flop with J = 1 and K = 1 has a 20 kHz clock input. The Q output is ________.
28.
The toggle condition in a master-slave J-K flip-flop means that Q and 
will switch to their ________ state(s) at the ________.
will switch to their ________ state(s) at the ________.29.
An RC circuit used in a nonretriggerable 74121 one-shot has an REXT of 49 k
and a CEXT of 0.2 
F. The pulse width (tW) is approximately ________.
and a CEXT of 0.2 F. The pulse width (tW) is approximately ________.6.9 s
s6.9 ms
69 ms
690 ms
30.
On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________.
Quick links
Quantitative Aptitude
Verbal (English)
Reasoning
Programming
Interview
Placement Papers