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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 21
11.
The product of which of the following gives the figure of merit of a logic family?
Gain and bandwidth
Propagation delay time and power dissipation
Fan-out and propagation delay time
Noise margin and power dissipation
Answer: Option
Explanation:
No answer description is available. Let's discuss.
12.
A JK flip flop can be converted to D flip flop by
Connecting both J and K terminals to D
Connecting J terminal to D and leaving K open
Connecting K terminal to D and leaving J open
Connecting J terminal to D and K terminal to D through an inverter
Answer: Option
Explanation:
No answer description is available. Let's discuss.
13.
In a 4 bit parallel in parallel out shift register A = 1, B = 1, C = 0, D = 1. The data output after 3 clock pulses is
1101
1001
0101
0001
Answer: Option
Explanation:
No answer description is available. Let's discuss.
14.

Assertion (A): A 4 input variable logic circuit can be implemented using a 8 : 1 multiplexer.

Reason (R): When a multiplexer is used as a logic function generator, the logic design is simple.

Both A and R are correct and R is correct explanation of A
Both A and R are correct but R is not correct explanation of A
A is true, R is false
A is false, R is true
Answer: Option
Explanation:
No answer description is available. Let's discuss.
15.
A 6 MHz channel is used by a digital signalling system initializing four-level signals. The maximum possible transmission rate is
6M bands/s
12M bands/s
6 M bits/s
12M bits/s
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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