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Digital Electronics - Flip-Flops

Exercise : Flip-Flops - General Questions
61.
Asynchronous inputs will cause the flip-flop to respond immediately with regard to the clock input.
True
False
Answer: Option
Explanation:
No answer description is available. Let's discuss.
62.
Which is not a real advantage of HDL?
Using higher levels of abstraction
Tailoring components to exactly fit the needs of the project
The use of graphical tools
Using higher levels of abstraction and tailoring components to exactly fit the needs of the project
Answer: Option
Explanation:
No answer description is available. Let's discuss.
63.
Two J-K flip-flops with their J-K inputs tied HIGH are cascaded to be used as counters. After four input clock pulses, the binary count is ________.
00
11
01
10
Answer: Option
Explanation:
No answer description is available. Let's discuss.
64.
Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
cross coupling
gate impedance
low input voltages
asynchronous operation
Answer: Option
Explanation:
No answer description is available. Let's discuss.
65.
In VHDL, how is each instance of a component addressed?
A name followed by a colon and the name of the library primitive
A name followed by a semicolon and the component type
A name followed by the library being used
A name followed by the component library number
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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