Online Digital Electronics Test - Digital Electronics Test - Random



Loading...  Loading Test...

Instruction:

  • This is a FREE online test. DO NOT pay money to anyone to attend this test.
  • Total number of questions : 20.
  • Time alloted : 30 minutes.
  • Each question carry 1 mark, no negative marks.
  • DO NOT refresh the page.
  • All the best :-).


1.

For a multistage counter to be truly synchronous, the ________ of each stage must be connected to ________.

A.
Cp, the same clock input line
B.
CE, the same clock input line
C.
, the terminal count output
D.
, both clock input lines

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Counters

Discuss about this problem : Discuss in Forum


2.

When analog inputs from several sources are to be converted, a multiplexing technique can be used so that one ADC may be time-shared.

A.
True
B.
False

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Interfacing to the Analog World

Discuss about this problem : Discuss in Forum


3.

During a read operation the CPU fetches ________.

A.
a program instruction
B.
another address
C.
data itself
D.
all of the above

Your Answer: Option (Not Answered)

Correct Answer: Option D

Learn more problems on : Computers

Discuss about this problem : Discuss in Forum


4.

Polled I/O works best when ________.

A.
there are no priority considerations
B.
priority considerations are frequent
C.
the polling rate exceeds 1000 s
D.
the polling rate is below 1000 s

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Computers

Discuss about this problem : Discuss in Forum


5.

SPLDs, CPLDs, and FPGAs are all which type of device?

A.
PAL
B.
PLD
C.
EPROM
D.
SRAM

Your Answer: Option (Not Answered)

Correct Answer: Option B

Learn more problems on : Programmable Logic Device

Discuss about this problem : Discuss in Forum


6.

The hard core portions of FPGAs are reprogrammable in the field.

A.
True
B.
False

Your Answer: Option (Not Answered)

Correct Answer: Option B

Learn more problems on : Programmable Logic Device

Discuss about this problem : Discuss in Forum


7.

In the frequency counter, the length of time for the ________ to be enabled can be selected with the range select input.

A.
display register
B.
frequency prescaler
C.
BCD counter
D.
signal generator

Your Answer: Option (Not Answered)

Correct Answer: Option C

Learn more problems on : Digital System Projects Using HDL

Discuss about this problem : Discuss in Forum


8.

In positive logic, ________.

A.
a HIGH = 1, a LOW = 0
B.
a LOW = 1, a HIGH = 0
C.
only HIGHs are present
D.
only LOWs are present

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Digital Concepts

Discuss about this problem : Discuss in Forum


9.

In a FLEX10K device, the carry chain provides a fast carry forward function between ________.

A.
LUTs
B.
EABs
C.
LEs
D.
LABs

Your Answer: Option (Not Answered)

Correct Answer: Option C

Learn more problems on : Programmable Logic Device

Discuss about this problem : Discuss in Forum


10.

In the GAL16V8, the ________ selects the signal that is fed back into the input matrix.

A.
FMUX
B.
OMUX
C.
PTMUX
D.
TSMUX

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Programmable Logic Device

Discuss about this problem : Discuss in Forum


11.

For each bit that is added to a digital ramp ADC, the conversion time ________.

A.
doubles
B.
triples
C.
decreases by one-third
D.
decreases by one-half

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Interfacing to the Analog World

Discuss about this problem : Discuss in Forum


12.

A microcontroller is called a computer on a chip.

A.
True
B.
False

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : The 8051 Microcontroller

Discuss about this problem : Discuss in Forum


13.

A retriggerable one shot has a pulse of 10 ms. 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be ________ ms.

A.
3
B.
7
C.
10
D.
13

Your Answer: Option (Not Answered)

Correct Answer: Option D

Learn more problems on : Multivibrators and 555 Timer

Discuss about this problem : Discuss in Forum


14.

From the following specifications determine the fan-out for the logic family.

A.
HIGH state is 16, LOW state is 8
B.
HIGH state is 8, LOW state is 16
C.
HIGH state is 4, LOW state is 8
D.
HIGH state is 8, LOW state is 4

Your Answer: Option (Not Answered)

Correct Answer: Option B

Learn more problems on : Logic Families and Their Characteristics

Discuss about this problem : Discuss in Forum


15.

A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?

A.
The output of the gate appears to be open.
B.
The dim indication on the logic probe indicates that the supply voltage is probably low.
C.
The dim indication is a result of a bad ground connection on the logic probe.
D.
The gate may be a tristate device.

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Combinational Logic Circuits

Discuss about this problem : Discuss in Forum


16.

If a 3-input NOR gate has eight input possibilities, how many of those possibilities will result in a HIGH output?

A.
1
B.
2
C.
7
D.
8

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Logic Gates

Discuss about this problem : Discuss in Forum


17.

Parallel data transfers between two different sets of registers require more than one shift pulse.

A.
True
B.
False

Your Answer: Option (Not Answered)

Correct Answer: Option B

Learn more problems on : Flip-Flops

Discuss about this problem : Discuss in Forum


18.

In VHDL, data can be each of the following types except ________.

A.
BIT
B.
BIT_VECTOR
C.
STD_LOGIC
D.
STD_VECTOR

Your Answer: Option (Not Answered)

Correct Answer: Option D

Learn more problems on : Combinational Logic Circuits

Discuss about this problem : Discuss in Forum


19.

VHDL is very strict in the way it allows us to assign and compare ________ such as signals, variables, constants, and literals.

A.
objects
B.
LOGIC_VECTORS
C.
designs
D.
arrays

Your Answer: Option (Not Answered)

Correct Answer: Option A

Learn more problems on : Combinational Logic Circuits

Discuss about this problem : Discuss in Forum


20.

In general, when using a scope to troubleshoot digital systems the instrument should be triggered by ________.

A.
the A channel or channel 1
B.
the vertical input mode, when using more than one channel
C.
the system clock
D.
line sync, in order to observe troublesome power line glitches

Your Answer: Option (Not Answered)

Correct Answer: Option C

Learn more problems on : Counters

Discuss about this problem : Discuss in Forum


Submit your test now to view the Results and Statistics with answer explanation.