Digital Electronics - Flip-Flops - Discussion

Discussion Forum : Flip-Flops - General Questions (Q.No. 25)
25.
Which of the following describes the operation of a positive edge-triggered D flip-flop?
If both inputs are HIGH, the output will toggle.
The output will follow the input on the leading edge of the clock.
When both inputs are LOW, an invalid state exists.
The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
3 comments Page 1 of 1.

Asha said:   8 years ago
Toggle condition is removed by using JK flip flop in any type of flip flops.

Tanaya said:   1 decade ago
@Vijay

This cndition is just 4 confusing us...the main phenomenan of d flip flop is the o/p will follow d i/p whn enable pin is high.

Vijay said:   1 decade ago
Why generate the toggle condition. ?

Can we remove this condition. ?

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