Electronics and Communication Engineering - Digital Electronics

16. 

39.1210 = __________ 10

A. 10111.0001111
B. 100011.0001111
C. 100001.0001111
D. 001111.0001111

Answer: Option A

Explanation:

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17. 

Which of the following is best suited for parity checking and parity generation?

A. AND, OR, NOT gates
B. XOR, Exclusive NOR gate
C. NAND gates
D. NOR gates

Answer: Option B

Explanation:

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18. 

In the circuit shown below, the outputs Y1 and Y2 for the given initial condition Y1 = Y2 = 1 and after four input pulses will be

A. Y1 = 1, Y2 = 0
B. Y1 = 0, Y2 = 0
C. Y1 = 0, Y2 = 1
D. Y1 = 1, Y2 = 1

Answer: Option D

Explanation:

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19. 

The op amp is used in

A. A/D converters
B. D/A converters
C. both (a) and (b)
D. shift registers

Answer: Option C

Explanation:

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20. 

Assertion (A): Power drain of CMOS increases with operating frequency

Reason (R): All unused CMOS inputs should be tied either to a fixed voltage level (0 or VDD) or to another input.

A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true

Answer: Option B

Explanation:

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