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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 20
46.
Data from a satellite is received in serial form (1 bit after another). If this data is coming at a 5 MHz rate and if the clock frequency is 5 MHz how long will it take to serially load a word in a 32-bit shift register?
1.6ms
3.2ms
6.4ms
12.8ms
Answer: Option
Explanation:
No answer description is available. Let's discuss.
47.
Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after CMA?
6 AH, 1
6 AH, 0
59 H, 0
9 H, 0
Answer: Option
Explanation:
No answer description is available. Let's discuss.
48.
The minimum number of 2 input NAND gates required to implement Boolean function A B C is A, B, C are available is
2
3
5
6
Answer: Option
Explanation:
No answer description is available. Let's discuss.
49.
Single parity check is not reliable in case of
paper tape
magnetic tape
magnetic drum
cores
Answer: Option
Explanation:
No answer description is available. Let's discuss.
50.
A 0 to 6 counter consist of 3 flip-flop and a combinational circuit of 2 input gates. The combinational circuit consist of
one AND gate
one OR gate
one AND and One OR
two AND gate
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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