Electronics and Communication Engineering - Digital Electronics

46. 

Data from a satellite is received in serial form (1 bit after another). If this data is coming at a 5 MHz rate and if the clock frequency is 5 MHz how long will it take to serially load a word in a 32-bit shift register?

A. 1.6ms
B. 3.2ms
C. 6.4ms
D. 12.8ms

Answer: Option C

Explanation:

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47. 

Assuming accumulator contain A 64 and the carry is set (1). What will register A and (CY) contain after CMA?

A. 6 AH, 1
B. 6 AH, 0
C. 59 H, 0
D. 9 H, 0

Answer: Option C

Explanation:

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48. 

The minimum number of 2 input NAND gates required to implement Boolean function A B C is A, B, C are available is

A. 2
B. 3
C. 5
D. 6

Answer: Option C

Explanation:

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49. 

Single parity check is not reliable in case of

A. paper tape
B. magnetic tape
C. magnetic drum
D. cores

Answer: Option C

Explanation:

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50. 

A 0 to 6 counter consist of 3 flip-flop and a combinational circuit of 2 input gates. The combinational circuit consist of

A. one AND gate
B. one OR gate
C. one AND and One OR
D. two AND gate

Answer: Option D

Explanation:

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