# Electronics and Communication Engineering - Digital Electronics

41.

In C-language f- = 9 is equivalent to

 A. f = -9 B. f = f - 9 C. f = 9 - 1 D. -f = 9

Explanation:

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42.

Explanation:

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43.

Typical switching time for ECL is

 A. 5 nano seconds B. 5 micro seconds C. 5 milli seconds D. 5 seconds

Explanation:

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44.

For the K map of the given figure the simplified Boolean expression is

 A. A B + A B B. B C. A D. AB

Explanation:

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45.

For a logic family
VOH is the minimum output high level voltage

1. VOL is the maximum output low level voltage
2. VIH is the minimum acceptable input high level voltage
3. VIL is the maximum acceptable input low level voltage
The correct relationship is

 A. VIH > V0H > VIL > V0L B. VOH > VIH > VIL > V0L C. VIH > VOH > VOL > VIL D. VOH > VIH > VOL > VIL