Electronics and Communication Engineering - Digital Electronics
Exercise : Digital Electronics - Section 17
- Digital Electronics - Section 13
- Digital Electronics - Section 24
- Digital Electronics - Section 23
- Digital Electronics - Section 22
- Digital Electronics - Section 21
- Digital Electronics - Section 20
- Digital Electronics - Section 19
- Digital Electronics - Section 18
- Digital Electronics - Section 17
- Digital Electronics - Section 16
- Digital Electronics - Section 15
- Digital Electronics - Section 14
- Digital Electronics - Section 1
- Digital Electronics - Section 12
- Digital Electronics - Section 11
- Digital Electronics - Section 10
- Digital Electronics - Section 9
- Digital Electronics - Section 8
- Digital Electronics - Section 7
- Digital Electronics - Section 6
- Digital Electronics - Section 5
- Digital Electronics - Section 4
- Digital Electronics - Section 3
- Digital Electronics - Section 2
41.
In C-language f- = 9 is equivalent to
42.
Effective address is calculated by adding or subtracting displacement value to
43.
Typical switching time for ECL is
44.
For the K map of the given figure the simplified Boolean expression is


45.
For a logic family
VOH is the minimum output high level voltage
VOH is the minimum output high level voltage
- VOL is the maximum output low level voltage
- VIH is the minimum acceptable input high level voltage
- VIL is the maximum acceptable input low level voltage
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