Electronics and Communication Engineering - Digital Electronics
Exercise :: Digital Electronics - Section 17
21. |
Choose the appropriate turn on and turn off time of a FET |
A. |
1 ns, 10ns | B. |
6 ns, 18ns | C. |
4 ns, 8 ns | D. |
10 ns, 10 ns |
Answer: Option B
Explanation:
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22. |
Consider the following statements - ECL has least propagation delay
- TTL has largest fan out
- CMOS has highest noise margin
- TTL has lowest power dissipation
Which of these are correct? |
A. |
1 and 3 | B. |
2 and 4 | C. |
3 and 4 | D. |
1 and 2 |
Answer: Option A
Explanation:
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23. |
In Schottky TTL, a Schottky diode is used for |
A. |
forming the gate | B. |
connecting the resistor | C. |
clamping of the basic collector junction | D. |
none of the above |
Answer: Option C
Explanation:
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24. |
The circuit of the given figure is
 |
A. |
full adder | B. |
magnitude comparator | C. |
parity detector | D. |
none of the above |
Answer: Option C
Explanation:
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25. |
Which of the following ICs has only one NAND gate? |
Answer: Option C
Explanation:
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