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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 17
21.
Choose the appropriate turn on and turn off time of a FET
1 ns, 10ns
6 ns, 18ns
4 ns, 8 ns
10 ns, 10 ns
Answer: Option
Explanation:
No answer description is available. Let's discuss.
22.
Consider the following statements
  1. ECL has least propagation delay
  2. TTL has largest fan out
  3. CMOS has highest noise margin
  4. TTL has lowest power dissipation
Which of these are correct?
1 and 3
2 and 4
3 and 4
1 and 2
Answer: Option
Explanation:
No answer description is available. Let's discuss.
23.
In Schottky TTL, a Schottky diode is used for
forming the gate
connecting the resistor
clamping of the basic collector junction
none of the above
Answer: Option
Explanation:
No answer description is available. Let's discuss.
24.
The circuit of the given figure is
full adder
magnitude comparator
parity detector
none of the above
Answer: Option
Explanation:
No answer description is available. Let's discuss.
25.
Which of the following ICs has only one NAND gate?
7410
7420
7430
7447
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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