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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 15
6.
A 1 ms pulse can be converted into a 10 ms pulse by using which one of the following
An astable multivibrator
Stable multivibrator
A bistable multivibrator
A J-K flip-flop
Answer: Option
Explanation:
No answer description is available. Let's discuss.
7.
In the DRAM cell in the figure is the Vt of the NMOSFET is 1 V. For the following three combinations of WL and BL voltages.
5 V, 3 V, 7 V
4 V, 3 V, 4 V
5 V, 5 V, 5 V
4 V, 4 V, 4 V
Answer: Option
Explanation:
No answer description is available. Let's discuss.
8.

Assertion (A): The carry look ahead adder is very fast

Reason (R): The carry look ahead adder generates the carry and sum digits directly.

Both A and R are correct and R is correct explanation of A
Both A and R are correct but R is not correct explanation of A
A is true, R is false
A is false, R is true
Answer: Option
Explanation:
No answer description is available. Let's discuss.
9.
The factors which govern fan out of CMOS gates are
maximum permissible propagation delay
input capacitance of each load
both (a) and (b)
neither (a) nor (b)
Answer: Option
Explanation:
No answer description is available. Let's discuss.
10.
Which of the following subtraction operations do not result in F16?
  1. (BA)16 - (AB)16
  2. (BC)16 - (CB)16
  3. (CB)16 - (BC)16
  4. (CB)16 - (BC)16
Select the correct answer
1 and 2
1 and 3
2 and 3
1, 2 and 3
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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