Electronics and Communication Engineering - Digital Electronics

26. 

TTL circuit with active pull up is preferred because of its suitability for

A. wired AND operation
B. bus operated system
C. wired logic operation
D. reasonable dissipation and speed of operation

Answer: Option D

Explanation:

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27. 

A parity check usually can detect

A. one-bit error
B. double-bit error
C. three-bit error
D. any-bit error

Answer: Option A

Explanation:

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28. 

Which of the following is 'synchronous'?

A. Half adder
B. Full adder
C. R-S flip-flop
D. Clocked R-S flip-flop

Answer: Option D

Explanation:

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29. 

TRAP is __________ whereas RST 7.5, RST 6.5, RST 5.5 are __________ .

A. maskable, non-maskable
B. maskable, maskable
C. non-maskable, non-maskable
D. non-maskable, maskable

Answer: Option D

Explanation:

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30. 

For a binary half subtractor having two inputs A and B the correct sets of logical expressions for the outputs D (A - B) and X = Borrow are

A. D = AB + AB, X = AB
B. D = AB AB, X = AB
C. D = AB + AB, X = AB
D. D = AB + A B, X = AB

Answer: Option C

Explanation:

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