Electronics and Communication Engineering - Digital Electronics

46. 

Periodic recharging of the memory cells at regular intervals of 3 to 8 millisecond is required in a

A. ROM
B. Static RAM
C. Dynamic RAM
D. PLA

Answer: Option C

Explanation:

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47. 

The frequency of the driving network connected between pins 1 and 2 of a 8085 chip must be

A. equal to the desired clock frequency
B. twice the desired clock frequency
C. four times the desired clock frequency
D. eight times the desired clock frequency

Answer: Option B

Explanation:

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48. 

Assertion (A): Divide-64 counter is a Mod-64 counter and divides the input frequency by 64

Reason (R): A Mod 64 counter can be obtained by cascading Mod 16 and Mod 4 counters.

A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true

Answer: Option B

Explanation:

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49. 

In number system e.g. 6, a “decade” counter has to recycle to 0 at the sixth count. Which of the connections indicate below will realize this resetting? (a logic “0” at the R inputs resets the counters)

A.
B.
C.
D. None of these

Answer: Option C

Explanation:

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50. 

In 8085 microprocessor, in order to enable INTR interrupt, which of the following instruction are needed?

A. EI only
B. SIM only
C. El and SIM both
D. None

Answer: Option A

Explanation:

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