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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 11
46.
Periodic recharging of the memory cells at regular intervals of 3 to 8 millisecond is required in a
ROM
Static RAM
Dynamic RAM
PLA
Answer: Option
Explanation:
No answer description is available. Let's discuss.
47.
The frequency of the driving network connected between pins 1 and 2 of a 8085 chip must be
equal to the desired clock frequency
twice the desired clock frequency
four times the desired clock frequency
eight times the desired clock frequency
Answer: Option
Explanation:
No answer description is available. Let's discuss.
48.

Assertion (A): Divide-64 counter is a Mod-64 counter and divides the input frequency by 64

Reason (R): A Mod 64 counter can be obtained by cascading Mod 16 and Mod 4 counters.

Both A and R are correct and R is correct explanation of A
Both A and R are correct but R is not correct explanation of A
A is true, R is false
A is false, R is true
Answer: Option
Explanation:
No answer description is available. Let's discuss.
49.
In number system e.g. 6, a “decade” counter has to recycle to 0 at the sixth count. Which of the connections indicate below will realize this resetting? (a logic “0” at the R inputs resets the counters)
None of these
Answer: Option
Explanation:
No answer description is available. Let's discuss.
50.
In 8085 microprocessor, in order to enable INTR interrupt, which of the following instruction are needed?
EI only
SIM only
El and SIM both
None
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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