Electronics and Communication Engineering - Digital Electronics
Exercise : Digital Electronics - Section 8
- Digital Electronics - Section 13
- Digital Electronics - Section 24
- Digital Electronics - Section 23
- Digital Electronics - Section 22
- Digital Electronics - Section 21
- Digital Electronics - Section 20
- Digital Electronics - Section 19
- Digital Electronics - Section 18
- Digital Electronics - Section 17
- Digital Electronics - Section 16
- Digital Electronics - Section 15
- Digital Electronics - Section 14
- Digital Electronics - Section 1
- Digital Electronics - Section 12
- Digital Electronics - Section 11
- Digital Electronics - Section 10
- Digital Electronics - Section 9
- Digital Electronics - Section 8
- Digital Electronics - Section 7
- Digital Electronics - Section 6
- Digital Electronics - Section 5
- Digital Electronics - Section 4
- Digital Electronics - Section 3
- Digital Electronics - Section 2
41.
In a 4 bit counter the output of 3 JK FFs from MSB downward are connected to the NAND gate whose O/P is connected to CLR
42.
For checking the parity of a digital word, it is preferable to use
43.
Among the digital IC families - ECL, TTL, and CMOS
44.
In ASCII, letter B is coded as
45.
The power dissipated per gate
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