Electronics and Communication Engineering - Digital Electronics

In following figure, the initial contents of the 4-bit serial in parallel out, right shift, shift register as shown in figure are 0110. After 3 clock pulses the contents of the shift register will be

For the logic circuit of the given figure, the minimized expression is

Binary multiplication can be done by repeated addition.

Assertion (A): In totem pole output the output impedance is low.

Reason (R): TTL gate with active pull up should not be used in wired AND connection.

A 4 bit synchronous counter uses flip flops with a delay time of 15 ns each. The time required for change of state is