Electronics and Communication Engineering - Digital Electronics

16. 

Find the FSV (full scale voltage) in a 6 bit R-2R ladder D/A converter has a reference voltage of 6.5 V.

A. 6.4 V
B. 0.1 V
C. 7 V
D. 8 V

Answer: Option A

Explanation:

.


17. 

Parallel adder is

A. sequential circuit
B. combinational circuit
C. either sequential or combinational circuit
D. none of the above

Answer: Option B

Explanation:

Adder is a combinational circuit.


18. 

An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is

A. 1
B. 2
C. 4
D. 8

Answer: Option D

Explanation:

In serial shift register one pulse is needed to store each bit.


19. 

In the given figure, A = B = 1 and C = D = 0. Then Y =

A. 1
B.
C. either 1 or 0
D. indeterminate

Answer: Option B

Explanation:

The CD inputs when fed to NOR gate give output 1. Therefore Y = 1.1.1 = 0.


20. 

Assertion (A): CMOS devices have very high speed.

Reason (R): CMOS devices have very small physical size and simple geometry.

A. Both A and R are correct and R is correct explanation of A
B. Both A and R are correct but R is not correct explanation of A
C. A is true, R is false
D. A is false, R is true

Answer: Option D

Explanation:

CMOS has high packing density but low speed.