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Electronics and Communication Engineering - Digital Electronics

Exercise : Digital Electronics - Section 3
16.
Find the FSV (full scale voltage) in a 6 bit R-2R ladder D/A converter has a reference voltage of 6.5 V.
6.4 V
0.1 V
7 V
8 V
Answer: Option
Explanation:

.

17.
Parallel adder is
sequential circuit
combinational circuit
either sequential or combinational circuit
none of the above
Answer: Option
Explanation:

Adder is a combinational circuit.

18.
An 8 bit binary number is to be entered into an 8 bit serial shift register. The number of clock pulses required is
1
2
4
8
Answer: Option
Explanation:

In serial shift register one pulse is needed to store each bit.

19.
In the given figure, A = B = 1 and C = D = 0. Then Y =
1
0 
either 1 or 0
indeterminate
Answer: Option
Explanation:

The CD inputs when fed to NOR gate give output 1. Therefore Y = 1.1.1 = 0.

20.

Assertion (A): CMOS devices have very high speed.

Reason (R): CMOS devices have very small physical size and simple geometry.

Both A and R are correct and R is correct explanation of A
Both A and R are correct but R is not correct explanation of A
A is true, R is false
A is false, R is true
Answer: Option
Explanation:

CMOS has high packing density but low speed.

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