Electronics and Communication Engineering - Digital Electronics
Exercise : Digital Electronics - Section 2
- Digital Electronics - Section 13
- Digital Electronics - Section 24
- Digital Electronics - Section 23
- Digital Electronics - Section 22
- Digital Electronics - Section 21
- Digital Electronics - Section 20
- Digital Electronics - Section 19
- Digital Electronics - Section 18
- Digital Electronics - Section 17
- Digital Electronics - Section 16
- Digital Electronics - Section 15
- Digital Electronics - Section 14
- Digital Electronics - Section 1
- Digital Electronics - Section 12
- Digital Electronics - Section 11
- Digital Electronics - Section 10
- Digital Electronics - Section 9
- Digital Electronics - Section 8
- Digital Electronics - Section 7
- Digital Electronics - Section 6
- Digital Electronics - Section 5
- Digital Electronics - Section 4
- Digital Electronics - Section 3
- Digital Electronics - Section 2
31.
The dual of A + [B + (AC)] + D is
Answer: Option
Explanation:
In taking dual OR is replaced by AND and vice versa.
32.
A divide by 78 counter can be obtained by
Answer: Option
Explanation:
Modulus 13 x modulus 6 = modulus 78.
33.
The initial state of MOD-16 down counter is 0110. What state will it be after 37 clock pulses?
Answer: Option
Explanation:
A mod-16 counter goes through 16 states in one cycle of 16 Pulses.
It complete 2 cycles in 32 Pulses.
In the rest 5 Pulses, it moves down from 0110 = 610 - 510 = 110 or (001)2 .
34.
The number of address lines in EPROM 4096 x 8 is
Answer: Option
Explanation:
212 = 4096.
35.
If the inputs to a 3 bit binary adder are 1112 and 1112, the output will be 1102
Answer: Option
Explanation:
111 + 111 = 1110.
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