Digital Electronics - Flip-Flops

Exercise : Flip-Flops - Filling the Blanks
31.
If data is brought into the J terminal and its complement to the K terminal, a J-K flip-flop operates as a(n) ________.
S-C flip-flop
D flip-flop
gated S-C flip-flop
TOGGLE flip-flop
Answer: Option
Explanation:
No answer description is available. Let's discuss.

32.
The point(s) on this timing diagram where the Q output of a D latch will be HIGH is/are ________.

point 4
points 3 and 4
points 1 and 2
points 4 and 5
Answer: Option
Explanation:
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33.
The action of ________ a FF or latch is also called resetting.
breaking
clearing
freeing
changing
Answer: Option
Explanation:
No answer description is available. Let's discuss.

34.
The postponed symbol () on the output of a flip-flop identifies it as being ________.
a D flip-flop
a J-K flip-flop
pulse triggered
trailing edge-triggered
Answer: Option
Explanation:
No answer description is available. Let's discuss.

35.
The advantage of a J-K flip-flop over an S-R FF is that ________.
it has fewer gates
it has only one output
it has no invalid states
it does not require a clock input
Answer: Option
Explanation:
No answer description is available. Let's discuss.