Digital Electronics - Flip-Flops - Discussion

Discussion Forum : Flip-Flops - Filling the Blanks (Q.No. 32)
32.
The point(s) on this timing diagram where the Q output of a D latch will be HIGH is/are ________.

point 4
points 3 and 4
points 1 and 2
points 4 and 5
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
1 comments Page 1 of 1.

Sahana said:   1 decade ago
D is edge triggered. So only at the positive edge of the clock o/p changes.

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