Discussion :: Flip-Flops and Timers - General Questions (Q.No.2)
When both inputs of a J-K flip-flop cycle, the output will:
Answer: Option B
No answer description available for this question.
|Ravi Sinha said: (Sep 30, 2011)|
so the truth table of J K flip flop will be :-
J K Q(next state)
0 0 no change(Q)
0 1 reset(0)
1 0 set(1)
1 1 toggle(Q^)
|Asheer said: (Oct 1, 2011)|
|What is the meaning of inputs of j k flipflop cycle?|
|Sundar said: (Oct 3, 2011)|
|Assume J=0 and K=1
When cycle it, it becomes as J=1 and K=0.
|Anaya said: (Oct 14, 2011)|
|Then there will be change how answer is no change.|
|M.V.Krishna/Palvoncha said: (Dec 29, 2011)|
|Why can't the answer be toggle ?|
|Govind Singh said: (Feb 18, 2012)|
|I think correct answer is toggle because at 11 position jk toggle|
|Guru said: (Jun 8, 2013)|
|@Sundar clue is correct but small changes.
After one cycle the value of each input comes to the same value
ex: Assume J=0 and K=1.
After 1 cycle, it becomes as J=0->1->0(1 cycle complete) and K=1->0->1(1 cycle complete).
So answer is B. not change o/p.
|Adil said: (Mar 24, 2014)|
|@Ravi sinha tabe is right. When they form in cycle they form in 1 & 0 so output become no change.|
|Bhuji said: (Jun 28, 2014)|
|What is meant by toggle?|
|Ravikanth said: (Nov 6, 2014)|
Toggle means complement.
|Vihari said: (Dec 5, 2014)|
|Toggle condition when the J-K flip flop receives the both the inputs as high and clock is also in rise edge the output of the flip flop will be changes to 0 and 1.
It will not be constant constant output for every clock cycle it will race in between 1/0/1/0.
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