Electronics - Field Effect Transistors (FET) - Discussion
Discussion Forum : Field Effect Transistors (FET) - General Questions (Q.No. 7)
7.
In the constant-current region, how will the IDS change in an n-channel JFET?
Discussion:
13 comments Page 2 of 2.
Mohan said:
8 years ago
Option D is correct.
In according to the JFET graph,
1.Linear region
2.Pinch off region
3.Cutt off region
1.Linear region - Gate source voltage increases the drain current also increases.
2.Pinch off region - In which gate-source voltage, the drain current become zero the voltage is known as pinch off.
3.Cutt off region - After the pinch-off region the gate is not dependent the gate-source voltage.
In according to the JFET graph,
1.Linear region
2.Pinch off region
3.Cutt off region
1.Linear region - Gate source voltage increases the drain current also increases.
2.Pinch off region - In which gate-source voltage, the drain current become zero the voltage is known as pinch off.
3.Cutt off region - After the pinch-off region the gate is not dependent the gate-source voltage.
Sri said:
6 years ago
The pinch-off voltage for an N-channel JFET is 4V. When VGS=1V, lVDS(min)l at which pinch-off occurs is equal to
(1)
Smurtza said:
6 years ago
*N-type JFET is operated with VGS<=0; (i.e., reverse gate to source).
* VGS controls ID.
When VGS=0, IDSS=maximum current.
Assuming, initially, VGS=0;
Option A:
Now if we decrease VGS (more negative), then ID decreases; (Option A is correct only if we are given assumption " Assuming, initially, VGS=0;". Note, A and B are giving same meaning if this assumption is not considered.)
Option B:
Increasing VGS(greater than 0), will not increase current as N-channel JFET requires negative VGS for its operation (and thus for to be in constant current region for any VGS.)
Option C and D cannot be correct as VGS controls ID. In constant-current region, current is constant wrt VDS and not VGS.
* VGS controls ID.
When VGS=0, IDSS=maximum current.
Assuming, initially, VGS=0;
Option A:
Now if we decrease VGS (more negative), then ID decreases; (Option A is correct only if we are given assumption " Assuming, initially, VGS=0;". Note, A and B are giving same meaning if this assumption is not considered.)
Option B:
Increasing VGS(greater than 0), will not increase current as N-channel JFET requires negative VGS for its operation (and thus for to be in constant current region for any VGS.)
Option C and D cannot be correct as VGS controls ID. In constant-current region, current is constant wrt VDS and not VGS.
(1)
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