Digital Electronics - Flip-Flops - Discussion

Discussion Forum : Flip-Flops - Filling the Blanks (Q.No. 37)
37.
A gated S-R flip-flop is in the hold condition whenever ________.
the Gate Enable is HIGH
the Gate Enable is LOW
the S and R inputs are both LOW
the Gate Enable is HIGH and the S and R inputs are both LOW
Answer: Option
Explanation:
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