Digital Electronics - Counters
Exercise : Counters - General Questions
- Counters - General Questions
- Counters - True or False
- Counters - Filling the Blanks
41.
In an HDL ring counter, many invalid states are included in the programming by:
42.
In a VHDL retriggerable edge-triggered one-shot, which condition will not exist when a clock edge occurs?
43.
What function does the CTR DIV 8 circuit given below perform?
44.
Synchronous (parallel) counters eliminate the delay problems encountered with asynchronous (ripple) counters because the:
45.
List the state of each output pin of a 7447 if RBI = 0, LT = 1, A0 = 1, A1 = 0, A2 = 0, and A3 = 1.
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