Online Digital Electronics Test - Digital Electronics Test 4

Instruction:

  • This is a FREE online test. Beware of scammers who ask for money to attend this test.
  • Total number of questions: 20.
  • Time allotted: 30 minutes.
  • Each question carries 1 mark; there are no negative marks.
  • DO NOT refresh the page.
  • All the best!

Marks : 2/20


Total number of questions
20
Number of answered questions
0
Number of unanswered questions
20
Test Review : View answers and explanation for this test.

1.
Once a signal is digitized, the information it contains does not ________ as it is processed.
complain
stiffen
compress
deteriorate
Your Answer: Option
(Not Answered)
Correct Answer: Option

2.
A computer will use ASCII code to store information internally.
True
False
Your Answer: Option
(Not Answered)
Correct Answer: Option

3.
The logic expression for a NOR gate is ________.
Your Answer: Option
(Not Answered)
Correct Answer: Option

4.
It is important to memorize logic symbols, Boolean equations, and truth tables for logic gates.
True
False
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(Not Answered)
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5.
The output of an AND gate is HIGH when any input is HIGH.
True
False
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6.

For the device shown here, assume the D input is LOW, both S inputs are LOW, and the input is LOW. What is the status of the outputs?

All are HIGH.
All are LOW.
All but are LOW.
All but are HIGH.
Your Answer: Option
(Not Answered)
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7.
Looping on a K-map always results in the elimination of:
variables within the loop that appear only in their complemented form.
variables that remain unchanged within the loop.
variables within the loop that appear in both complemented and uncomplemented form.
variables within the loop that appear only in their uncomplemented form.
Your Answer: Option
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8.
VHDL was created as a very flexible language and it allows us to define the operation of clocked devices in the code without relying on logic primitives.
True
False
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9.
A(n) ________ one-shot starts a pulse in response to a trigger and will restart the internal pulse timer every time a subsequent trigger edge occurs before the pulse is complete.
non-retriggerable
retriggerable
high-level triggered
edge-triggered
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10.
ROMs retain data when the ________.
power is off
power is on
system is down
all of the above
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(Not Answered)
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11.
The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.
address decoding
bus contention
bus collisions
address multiplexing
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12.
Select the statement that best describes Read-Only Memory (ROM).
nonvolatile, used to store information that changes during system operation
nonvolatile, used to store information that does not change during system operation
volatile, used to store information that changes during system operation
volatile, used to store information that does not change during system operation
Your Answer: Option
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13.
Address decoding for dynamic memory chip control may also be used for:
controlling refresh circuits
read and write control
chip selection and address location
memory mapping
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14.
ROM access time is defined as ________.
how long it takes to program the ROM chip
being the difference between the READ and WRITE times
the time it takes to get valid output data after a valid address is applied
the time required to activate the address lines after the ENABLE line is at a valid level
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15.
Most PAL devices have a tristate buffer driving the input pins.
True
False
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16.
The JTAG signals are named TDI, TDO, TMS, and TCK.
True
False
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17.
An EPM 7128S in a ________ PQFP package has 12 I/O per LAB plus 4 additional input-only pins for a total of 100 pins.
100-pin
120-pin
140-pin
160-pin
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18.
The SUBDESIGN section defines the input and output of the logic circuit block.
True
False
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19.
One CASE construct inside another CASE construct is called a do-loop.
True
False
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(Not Answered)
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20.
A logic circuit that provides a HIGH output if one input or the other input, but not both, is HIGH, is a(n):
Ex-NOR gate
OR gate
Ex-OR gate
NAND gate
Your Answer: Option
(Not Answered)
Correct Answer: Option

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