Electronics and Communication Engineering - Networks Analysis and Synthesis
Exercise : Networks Analysis and Synthesis - Section 13
- Networks Analysis and Synthesis - Section 14
- Networks Analysis and Synthesis - Section 27
- Networks Analysis and Synthesis - Section 26
- Networks Analysis and Synthesis - Section 25
- Networks Analysis and Synthesis - Section 24
- Networks Analysis and Synthesis - Section 23
- Networks Analysis and Synthesis - Section 22
- Networks Analysis and Synthesis - Section 21
- Networks Analysis and Synthesis - Section 20
- Networks Analysis and Synthesis - Section 19
- Networks Analysis and Synthesis - Section 18
- Networks Analysis and Synthesis - Section 17
- Networks Analysis and Synthesis - Section 16
- Networks Analysis and Synthesis - Section 15
- Networks Analysis and Synthesis - Section 1
- Networks Analysis and Synthesis - Section 13
- Networks Analysis and Synthesis - Section 12
- Networks Analysis and Synthesis - Section 11
- Networks Analysis and Synthesis - Section 10
- Networks Analysis and Synthesis - Section 9
- Networks Analysis and Synthesis - Section 8
- Networks Analysis and Synthesis - Section 7
- Networks Analysis and Synthesis - Section 6
- Networks Analysis and Synthesis - Section 5
- Networks Analysis and Synthesis - Section 4
- Networks Analysis and Synthesis - Section 3
- Networks Analysis and Synthesis - Section 2
16.
In the circuit of figure the current through 3 Ω resistance at t = ∞ is
Answer: Option
Explanation:
Since capacitor is open circuited at t = ∞, current 20/8 A.
17.
In figure, i(0-) and v(0-) are zero. The switch is closed at t = 0, i(0+) and (∞) are
Answer: Option
Explanation:
At i = 0 applied voltage = 3V and current must be 3A. At i = ∞ source voltage is zero and current must be zero.
18.
Tellegen's theorem is applicable to
19.
The Laplace transforms of voltage function shown in figure is
Answer: Option
Explanation:
The wave can be written as t u(t) - (t - a) u (t - a).
20.
Which of the statement is correct?
Answer: Option
Explanation:
Transistor circuits are analysed using h parameters.
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