Electronics and Communication Engineering - Digital Electronics - Discussion

Any one can explain in detail?

Why are we taking double bar?

We can replace 1 with double bar.

To get the simplified expression in terms of product form we take double bar on both sides.(the double bar doesn't change the value i.e.,F''=F)

If,
F'' = ((X' + Y')(Z = W))'',
F = (X'Z + X'W + Y'Z + Y'W)'',
F = ((X' + Y')' + (Z + W)')',
F = (X Y + Z'W')',
F = (X Y)' (Z + W,
F = (X Y)'Z + (X Y)'W.

By using four NAND gate we can implement the final expression.

Use DOT conversion rule, so we can convert F = (x' + y') (z + w) = xy + z'w'.

Now implement this using two input NAND gates.

Note: Use NAND as inverter to get z' and w'

The answer should be 5.

(x'+y')(z+w)--->xor gate. 4 nand gates are required.

(x' + y') (z + w) --- overall, AND function - to make NAND -> DOUBLE COMPLEMENT
{ [ (x' + y') (z + w) ]' }' -- then simplify terms in parenthesis: FACTOR OUT Negation (remember De Morgans).

{ [ (x y)' (z' w')' ]' }'

(xy)' - 1 NAND
z' - 1 NAND (complementation: SHORT two inputs)
w' - 1 NAND (complementation: SHORT two inputs)
(z'w')' - 1 NAND
[ (x y)' (z' w')' ]' - 1 NAND for the overall gate (carries all operations)
{ [ (x y)' (z' w')' ]' }' - LAST NAND for complement, since original term has AND overall function.

Overall, 6 NAND gates.
Well, not including INVERTERS, that would be 4.

F=(x'+y')(w+z)=(xy)'(w+z) now 1st take a NAND gate with the input X,Y that will produce (xy)'=k.

Let assume then take another two NAND gate which inputs are K ,W and K,Z then take another NAND gate with the input of those outputs that will produce the desire output.

For implementing I think we should not alter the given Boolean equation and according to the procedure it requires 6 NAND gates.

5 two input Nand gates.