Digital Electronics - Logic Gates - Discussion
Discussion Forum : Logic Gates - General Questions (Q.No. 3)
3.
If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the output is HIGH, the gate is a(n):
Discussion:
29 comments Page 1 of 3.
P.Narendra kumar said:
1 decade ago
In question he is not discussed about second input .we can take second input as a dont care if we apply the 0&dont care combination NAND gate will give the high output
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MAYPHICS said:
1 decade ago
Ok, then can anyone explain how its not NOR.
MADHU BADAVATH said:
1 decade ago
@Mayphics
Consider one situation that if you apply 2 inputs to NOR gate in that one of the input is LOW(i,e 0)..
Then the OUTPUT is entirely depends on the second input which will you provide.......
means ,,,,,,,2 Conditions here
1.IF second input is LOW(0) Then OUTPUT of the NOR gate is HIGH(1)
2.IF second input is HIGH(1), then OUTPUT of NOR gate Iis LOW(0)
But in this question we req. OUTPUT SHOULD be HIGH means OUTPUT independent of INPUT.......
So ANSWER is NAND GATE........
Consider one situation that if you apply 2 inputs to NOR gate in that one of the input is LOW(i,e 0)..
Then the OUTPUT is entirely depends on the second input which will you provide.......
means ,,,,,,,2 Conditions here
1.IF second input is LOW(0) Then OUTPUT of the NOR gate is HIGH(1)
2.IF second input is HIGH(1), then OUTPUT of NOR gate Iis LOW(0)
But in this question we req. OUTPUT SHOULD be HIGH means OUTPUT independent of INPUT.......
So ANSWER is NAND GATE........
R s dayal said:
1 decade ago
Here second input is not given, then we can take any i/p. 0 or 1.
Prasant said:
1 decade ago
In nor gate if one input is 0, and other is 1, then the output will be 0. If both input are low then the o/p is 1, so we conform that nor gate is not the answer but in nand gate if one input is 0 and other is either 0 or 1, the output is high. So the answer is nanad gate.
Krishna said:
1 decade ago
Can any one say why it is not OR?
Vinashi jindal said:
1 decade ago
Why it is NAND gate not NOR gate?
Mehak said:
1 decade ago
Hey when we give 1 low input and get high output the OR gate also gives the same result. So why it is only NAND gate not OR gate?
Jai said:
1 decade ago
In OR gate, if one input is zero and the other is 1, then O/P is 1. If both I/P's are 0, then O/P is 0. So the answer is NAND gate because in NAND gate if one I/P is 0 and the other is either 0 or 1, then O/P will be 1.
Madhu Badavath said:
1 decade ago
@Krishna.
NOR GATE means if any of the INPUT is HIGH OUTPUT is LOW.
But here condition is ONE of the INPUT is low and OUTPUT should be HIGH.
Its not valid in NOR GATE.
SO NAND-GATE will satisfy above condtion in all cases.
A B AND NAND OR NOR
0 0 0 1 0 1
0 1 0 1 1 0
From above table we can say answer is NAND-GATE(By-Default A=0, and B=0 or 1, o/p of NAND-GATE is HIGH only).
NOR GATE means if any of the INPUT is HIGH OUTPUT is LOW.
But here condition is ONE of the INPUT is low and OUTPUT should be HIGH.
Its not valid in NOR GATE.
SO NAND-GATE will satisfy above condtion in all cases.
A B AND NAND OR NOR
0 0 0 1 0 1
0 1 0 1 1 0
From above table we can say answer is NAND-GATE(By-Default A=0, and B=0 or 1, o/p of NAND-GATE is HIGH only).
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