Digital Electronics - Flip-Flops - Discussion

Discussion Forum : Flip-Flops - General Questions (Q.No. 56)
56.
As a general rule for stable flip-flop triggering, the clock pulse rise and fall times must be:
very long.
very short.
at a maximum value to enable the input control signals to stabilize.
of no consequence as long as the levels are within the determinate range of value.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
4 comments Page 1 of 1.

Manav said:   6 years ago
I think the answer is option 'C' because the clock pulse should allow the input to settle.

Vishnu said:   8 years ago
@Vijay.

I think it might be the one.

Vijay said:   1 decade ago
As there is a term of "propagation delay" related to flip flop which affects on the output of flip-flop, and if this rising and falling time is less. There is some possibilities of decreasing the propagation delay. That's why I think short time must be the correct answer.

Satya MAnoj said:   1 decade ago
Can anyone explain this? I thought there must be long enough time to stabilize?
(1)

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