Digital Electronics - Flip-Flops - Discussion
Discussion Forum : Flip-Flops - General Questions (Q.No. 53)
53.
On a J-K flip-flop, when is the flip-flop in a hold condition?
Discussion:
2 comments Page 1 of 1.
Swapnil bagul said:
9 years ago
00 Hold.
01 Reset.
10 Set.
11 Toggle.
01 Reset.
10 Set.
11 Toggle.
Pooja said:
1 decade ago
J=0 k=0 output continues to be in same state.
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