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Digital Electronics - Digital System Projects Using HDL

Exercise : Digital System Projects Using HDL - General Questions
21.
Which is not a step in strategic planning for HDL development?
There must be a way to test each piece.
Each block must fit together to make up the whole system.
The names of each input and output must be known.
The exact operation of each block must be thoroughly defined and understood.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
22.
In the frequency counter, when is the new count stored in the display register?
After disabling the counter
When the count buffer is full
After the sample interval is set
When the timing and control block has put it there
Answer: Option
Explanation:
No answer description is available. Let's discuss.
23.
What are two ways to remember the current state of a counter in VHDL?
With FUNCTIONS and PROCESS
With counters and timers
With SIGNAL and VARIABLE
With bit types
Answer: Option
Explanation:
No answer description is available. Let's discuss.
24.
In the digital clock project, what type of counter is used to count to 59 seconds?
MOD-60
MOD-6
BCD
BCD followed by a MOD-6
Answer: Option
Explanation:
No answer description is available. Let's discuss.
25.
In the keypad application, when all columns are HIGH, the ring counter is enabled and counting, and dav is LOW, what is the status of the d outputs?
On
Off
Hi-Z
1011
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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