Digital Electronics - Digital System Projects Using HDL

Exercise :: Digital System Projects Using HDL - Filling the Blanks

1. 

In the digital clock project, the 1 pps signal is used as a synchronous clock for all of the counter stages, which are ________.

A. advanced BCD counters
B. MOD-6 counters
C. synchronous cascaded
D. 1 pulse per second

Answer: Option C

Explanation:

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2. 

In the keypad encoder, the ________ must hold in its current state until a key is released.

A. ring counter
B. MOD-6 counter
C. BCD counter
D. freeze bit

Answer: Option A

Explanation:

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3. 

The interface of the stepper motor needs to operate in one of ________ mode(s).

A. one
B. two
C. three
D. four

Answer: Option D

Explanation:

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4. 

In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce square pulses at the rate of ________.

A. 1 pps
B. 60 pps
C. 100 pps
D. 600 pps

Answer: Option B

Explanation:

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5. 

A frequency counter ________ a signal.

A. measures
B. displays
C. measures and displays
D. measures, displays, and generates

Answer: Option C

Explanation:

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