Digital Electronics - Digital System Projects Using HDL

Exercise : Digital System Projects Using HDL - Filling the Blanks
1.
In the digital clock project, the 1 pps signal is used as a synchronous clock for all of the counter stages, which are ________.
advanced BCD counters
MOD-6 counters
synchronous cascaded
1 pulse per second
Answer: Option
Explanation:
No answer description is available. Let's discuss.

2.
In the keypad encoder, the ________ must hold in its current state until a key is released.
ring counter
MOD-6 counter
BCD counter
freeze bit
Answer: Option
Explanation:
No answer description is available. Let's discuss.

3.
The interface of the stepper motor needs to operate in one of ________ mode(s).
one
two
three
four
Answer: Option
Explanation:
No answer description is available. Let's discuss.

4.
In the digital clock project, the 60 Hz signal is sent through a Schmitt-trigger circuit to produce square pulses at the rate of ________.
1 pps
60 pps
100 pps
600 pps
Answer: Option
Explanation:
No answer description is available. Let's discuss.

5.
A frequency counter ________ a signal.
measures
displays
measures and displays
measures, displays, and generates
Answer: Option
Explanation:
No answer description is available. Let's discuss.