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Digital Electronics - Counters

Exercise : Counters - General Questions
31.
Which of the following procedures could be used to check the parallel loading feature of a counter?
Preset the LOAD inputs, set the CLR to its active level, and check to see that the Q outputs match the values preset into the LOAD inputs.
Apply LOWs to the parallel DATA inputs, pulse the CLK input, and check for LOWs on all the Q outputs.
Apply HIGHs to all the DATA inputs, pulse the CLK and CLR inputs, and check to be sure that the Q outputs are all LOW.
Apply HIGHs to all the Q terminals, pulse the CLK, and check to see if the DATA terminals now match the Q outputs.
Answer: Option
Explanation:
No answer description is available. Let's discuss.
32.
One of the major drawbacks to the use of asynchronous counters is:
low-frequency applications are limited because of internal propagation delays
high-frequency applications are limited because of internal propagation delays
asynchronous counters do not have major drawbacks and are suitable for use in high- and low-frequency counting applications
asynchronous counters do not have propagation delays and this limits their use in high-frequency applications
Answer: Option
Explanation:
No answer description is available. Let's discuss.
33.
Once an up-/down-counter begins its count sequence, it cannot be reversed.
True
False
Answer: Option
Explanation:
No answer description is available. Let's discuss.
34.
Three cascaded modulus-5 counters have an overall modulus of ________.
5
25
125
500
Answer: Option
Explanation:
No answer description is available. Let's discuss.
35.
An asynchronous 4-bit binary down counter changes from count 2 to count 3. How many transitional states are required?
None
One
Two
Fifteen
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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