Electronics and Communication Engineering - Exam Questions Papers - Discussion
Discussion Forum : Exam Questions Papers - Exam Paper 1 (Q.No. 32)
32.
In the circuit below, delay of the EXOR and AND
Logic gates are 20 μs and 10 μs respectively, then the wave y' and y (with initial condition y = 1) will be :
Logic gates are 20 μs and 10 μs respectively, then the wave y' and y (with initial condition y = 1) will be :
Answer: Option
Explanation:
Since y is at logic '1' initially, y' must be at logic '1'.
Also, one input of the EXOR gate is tied to zero therefore 'f' will be directly transferred to the output.
The logic gates will introduce gate delays which will lead to the answer .
Discussion:
Be the first person to comment on this question !
Post your comments here:
Quick links
Quantitative Aptitude
Verbal (English)
Reasoning
Programming
Interview
Placement Papers