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Electronics and Communication Engineering - Electronic Devices and Circuits - Discussion

Discussion Forum : Electronic Devices and Circuits - Section 9 (Q.No. 14)
Electronic Devices and Circuits
14.
In a JFET
the source gate junction is forward biased and gate drain junction is reverse biased
both the junctions are forward biased
both the junctions are reverse biased
the source gate junction is reverse biased and gate drain junction is forward biased
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
4 comments Page 1 of 1.
Saurabh kumar said:   5 years ago
In JFET there is no junction. Only a conducting channel path and gate is always reverse bias operated.

So, option D is the right answer.
Chandrasekaran said:   7 years ago
I think D is the answer.
Shadan said:   8 years ago
No, Answer should be D because JFET Input impedance high because VGS is reverse and Output impedance is low because VDS Is forward.
Parashurama.kn said:   8 years ago
I think the Answer is A.
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