Electronics and Communication Engineering - Digital Electronics - Discussion
Discussion Forum : Digital Electronics - Section 4 (Q.No. 23)
23.
A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to
Answer: Option
Explanation:
Propagation Delay for one FF is 50 nsec. For 4 FF = 50 x 4 = 200 nsec.
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Discussion:
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