Electronics and Communication Engineering - Digital Electronics - Discussion

23. 

A 4 bit modulo 16 ripple counter uses JK flip-flops. If the propagation delay of each FF is 50 ns. The max. clock frequency that can be used is equal to

[A]. 20 MHz
[B]. 10 MHz
[C]. 5 MHz
[D]. 4 MHz

Answer: Option C

Explanation:

Propagation Delay for one FF is 50 nsec. For 4 FF = 50 x 4 = 200 nsec..


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