IndiaBIX

Electronics and Communication Engineering - Digital Electronics - Discussion

Discussion Forum : Digital Electronics - Section 9 (Q.No. 1)
Digital Electronics
1.

Assertion (A): In a parallel in-serial out shift register data is loaded one bit-at a time

Reason (R): A serial in-serial out shift register can be used to introduce a time delay.

Both A and R are correct and R is correct explanation of A
Both A and R are correct but R is not correct explanation of A
A is true, R is false
A is false, R is true
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
Be the first person to comment on this question !
Post your comments here:

Your comments will be displayed after verification.

Quick links
Quantitative Aptitude
Verbal (English)
Reasoning
Programming
Interview
Placement Papers