Electronics and Communication Engineering - Digital Electronics - Discussion

Discussion Forum : Digital Electronics - Section 23 (Q.No. 30)
30.
The open collector gates in the given figure are tied together. The output Y =
A + B + C + D
A + B + C + D
(A + B) (C + D)
AB + CD
Answer: Option
Explanation:
No answer description is available. Let's discuss.
Discussion:
1 comments Page 1 of 1.

Diwakar said:   1 decade ago
Open collector TTL provides wired AND logic at output not OR.

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