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Electronics and Communication Engineering - Digital Electronics - Discussion

Discussion Forum : Digital Electronics - Section 2 (Q.No. 5)
Digital Electronics
5.
In a D latch
data bit D is fed to S input and D to R input
data bit D is fed to R input and D to S input
data bit D is fed to both R and S inputs
data bit D is not fed to any input
Answer: Option
Explanation:

Discussion:
2 comments Page 1 of 1.
Suki said:   9 years ago
As per my knowledge, the Question is incomplete because latch can be designed by using NAND and NOR gates. In SR latch S&R position depends on NAND & NOR gates.
Hari said:   7 years ago
R is the first input and S is the second input.
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