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Electronic Devices - DC Biasing-FETs

Exercise : DC Biasing-FETs - Filling the Blanks
16.
The coupling capacitors are ________ for the dc analysis and ________ for the ac analysis.
open-circuit, low impedance
short-circuit, low impedance
open-circuit, high impedance
None of the above
Answer: Option
Explanation:
No answer description is available. Let's discuss.
17.
________ levels of RS result in ________ quiescent values of ID and ________ negative values of VGS.
Increased, lower, less
Increased, higher, less
Increased, higher, more
Increased, less, lower
Answer: Option
Explanation:
No answer description is available. Let's discuss.
18.
In an enhancement-type MOSFET, the drain current is zero for levels of VGS less than the ________ level.
VGS(Th)
VGS(off)
VP
VDD
Answer: Option
Explanation:
No answer description is available. Let's discuss.
19.
For the field-effect transistor, the relationship between the input and the output quantities is ________.
linear
nonlinear
3rd degree
None of the above
Answer: Option
Explanation:
No answer description is available. Let's discuss.
20.
In p-channel FETs, the level of VGS is ________ while the level of VDS is ________.
negative, negative
positive, positive
negative, positive
positive, negative
Answer: Option
Explanation:
No answer description is available. Let's discuss.
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