Digital Electronics - Shift Registers - Discussion
Discussion Forum : Shift Registers - Filling the Blanks (Q.No. 9)
9.
Assume a 4-bit parallel in/serial out shift register is loaded with a binary number. How many clock pulses are required after the parallel load has occurred before the first bit in the sequence appears on the serial output line?
Discussion:
3 comments Page 1 of 1.
Sharath said:
5 years ago
In parallel_in for a single clock it will load the data. So before 1st bit appearing at output we require 1clock.
KIRAN V said:
5 years ago
Binary Numbers are only 0, 1. So, ONE clock pulse is enough.
Stalin said:
8 years ago
Anyone explain it.
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