Digital Electronics - Shift Registers
Exercise : Shift Registers - Filling the Blanks
- Shift Registers - General Questions
- Shift Registers - True or False
- Shift Registers - Filling the Blanks
1.
Assume a LOW logic level is placed on the SHIFT/LOAD input of a 74195 shift register. The output will change ________.
2.
A type of shift register in which the Q or Q output of one stage is not connected to the input of the next stage is ________.
3.
A Johnson counter, constructed with N flip-flops, has how many unique states?
4.
A type of shift register that requires access to the Q outputs of all stages is ________.
5.
An 8-bit serial in/parallel out shift register is clocked at 4 MHz and is used to delay a serial digital signal by 1.25 
s. The output that has the proper delay is ________.
s. The output that has the proper delay is ________.Quick links
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